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- Manufacturer No：SI5330A-A00200-GM
- Manufacturer：Silicon Labs
- Category：Clock/Timing - Clock Buffers, Drivers
- Datasheet：SI5330A-A00200-GM
- SKU：4419783
- Description：CML HCSL LVDS LVPECL SI5330 24-VFQFN Exposed Pad Obsolete clock driver 0.9mm 3.3V 2.5ns 710MHz
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User Guide
SI5330A-A00200-GM Details
CML HCSL LVDS LVPECL SI5330 24-VFQFN Exposed Pad Obsolete clock driver 0.9mm 3.3V 2.5ns 710MHz
SI5330A-A00200-GM Specification Parameters
- Mounting Type: Surface Mount
- Number of Functions: 1
- RoHS Status: RoHS Compliant
- Part Status: Obsolete
- Supply Voltage: 3.3V
- Operating Temperature: -40°C~85°C
- Number of Terminations: 24
- Pin Count: 24
- Terminal Position: QUAD
- Published: 1997
- Voltage - Supply: 1.71V~3.63V
- Supply Voltage-Min (Vsup): 2.97V
- Differential - Input:Output: Yes/Yes
- Subcategory: Clock Drivers
- Ratio - Input:Output: 1:4
- Max Duty Cycle: 60 %
- Type: Fanout Buffer (Distribution), Translator
- Base Part Number: SI5330
- Mount: Surface Mount
- Number of Circuits: 1
- Radiation Hardening: No
- Number of Outputs: 4
- Packaging: Tray
- Moisture Sensitivity Level (MSL): 3 (168 Hours)
- Number of Pins: 24
- Terminal Pitch: 0.5mm
- Output: LVPECL
- Height Seated (Max): 0.9mm
- Supply Voltage-Max (Vsup): 3.63V
- Package / Case: 24-VFQFN Exposed Pad
- Family: ECL
- Frequency (Max): 710MHz
- Propagation Delay: 2.5 ns
- Duty Cycle: 60 %
- Input: CML, HCSL, LVDS, LVPECL
- Weight: 41.191857mg
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Silicon Labs — Manufacturer Introduction
Silicon Labs (NASDAQ: SLAB) is a leading provider of silicon, software and system solutions for the Internet of Things, Internet infrastructure, industrial control, consumer and automotive markets. Resolving the electronics industry's toughest problems, providing customers with significant advantages in performance, energy savings, connectivity, and design simplicity. Backed by world-class engineering teams with unsurpassed software and mixed-signal design expertise, Silicon Labs empowers developers with the tools and technologies they need to advance quickly and easily from initial idea to final product.
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